Alfred is a long-time teacher and computer enthusiast who works with and troubleshoots a wide range of computing devices. Computer signal processing can be achieved through analog, digital and hybrid forms. A signal is converted into electric pulse, radio wave or light by a process known as modulation. While the concept of signal processing can be as simple as an on and off direct current, it is also as complex as alternating or electromagnetic current.
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History of computing hardware
Selecting the proper ADC for a particular application appears to be a formidable task, considering the thousands of converters currently on the market. A direct approach is to go right to the selection guides and parametric search engines, such as those available on the Analog Devices website. Is there a way to approach the task with greater understanding—and better results? A basic understanding of these, the three most popular ADC architectures—and their relationship to the market segments—is a useful supplement to the selection guides and search engines.
The classification in Figure 1 shows in a general way how these application segments and the associated typical architectures relate to ADC resolution vertical axis and sampling rate horizontal axis. The dashed lines represent the approximate state of the art in mid Even though the various architectures have specifications with a good deal of overlap, the applications themselves are key to choosing the specific architecture required.
The successive-approximation ADC is by far the most popular architecture for data-acquisition applications, especially when multiple channels require input multiplexing. The architecture was first utilized in experimental pulse-code-modulation PCM systems by Bell Labs in the s.
The basic successive-approximation architecture is shown in Figure 2. The comparator determines whether the SHA output is greater or less than the DAC output, and the result the most-significant bit MSB of the conversion is stored in the successive-approximation register SAR as a 1 or a 0. The result 1 or 0 is stored in the register, and the process continues until all of the bit values have been determined. The acronym, SAR , which actually stands for successive-approximation register —the logic block that controls the conversion process—is universally understood as an abbreviated name for the entire architecture.
The basic algorithm used in the successive-approximation ADC conversion process can be traced back to the s. It is related to the solution of a useful mathematical puzzle—the determination of an unknown weight by a minimal sequence of weighing operations Reference 1. In this problem, as stated, the object is to determine the least number of weights which would serve to weigh an integral number of pounds from 1 lb to 40 lb using a balance scale. One solution put forth by the mathematician Tartaglia in , was to use the binary series of weights 1 lb, 2 lb, 4 lb, 8 lb, 16 lb, and 32 lb or 2 0 , 2 1 , 2 2 , 2 3 , 2 4 , and 2 5.
The proposed weighing algorithm is the same one that is used in modern successive-approximation ADCs. It should be noted that this solution will actually measure unknown weights up to 63 lb 2 6 — 1 rather than 40 lb as stated in the problem.
Indeed, 40 lbs is then maximum with these weights. However, the process of depositing and trimming thin-film resistors adds cost, and the thin-film resistor values may be affected after the device is subjected to the mechanical stresses of packaging. The principal advantage of the switched-capacitor DAC is that the accuracy and linearity are primarily determined by high-accuracy photolithography, which establishes the capacitor plate area, hence the capacitance and the degree of matching.
In addition, small capacitors can be placed in parallel with the main capacitors—to be switched in and out under control of autocalibration routines—to achieve high accuracy and linearity without the need for thin-film laser trimming. Therefore, input multiplexing can be added to the basic SAR ADC function relatively straightforwardly, thus allowing the integration of a complete data-acquisition system on a single chip.
Additional digital functions are also easy to add to SAR-based ADCs, so features such as multiplexer sequencing, autocalibration circuitry, and more are becoming common. The sequencer allows automatic conversion of the selected channels, or channels can be addressed individually if desired.
Data is transferred via the serial port. High resolution, together with on-chip programmable-gain amplifiers PGAs , allows the small output voltages of sensors—such as weigh scales and thermocouples—to be digitized directly. Proper selection of sampling rate and digital filter bandwidth also yields excellent rejection of Hz and Hz power-line frequencies. However, because digital filters then a rarity were an integral part of the architecture, practical IC implementations did not appear until the late s, when signal processing in digital CMOS became widely available.
In Figure 6B, the sampling frequency has been increased by a factor, K , the oversampling ratio , but the input signal bandwidth is unchanged.
The quantization noise falling outside the signal bandwidth is then removed with a digital filter. The output data rate can now be reduced decimated back to the original sampling rate, f S.
The output of the modulator is a 1-bit stream of data. Because of negative feedback around the integrator, the average value of the signal at B must equal V IN. If V IN is zero i. As the input signal goes more positive, the number of 1s increases, and the number of 0s decreases. Likewise, as the input signal goes more negative, the number of 1s decreases, and the number of 0s increases.
The ratio of the 1s in the output stream to the total number of samples in the same interval—the ones density —must therefore be proportional to the dc value of the input.
The modulator also accomplishes the noise-shaping function by acting as a low-pass filter for the signal and a high-pass filter for the quantization noise. However, the digital filter does introduce inherent pipeline delay , which definitely must be considered in multiplexed and servo applications. Several output clock cycles are generally required for this settling. Increasing the number of integrators in the modulator similar to adding poles to a filter provides more noise shaping at the expense of a more complex design—as shown in Figure 8 for a second-order 1-bit modulator.
Note the improvement in the noise shaping characteristic compared to a first-order modulator. Higher-order modulators greater than third order are difficult to stabilize and present significant design challenges. A popular alternative to higher-order modulators is to use a multibit architecture, where the 1-bit ADC comparator is replaced with an N-bit flash converter, and the single-bit DAC switch is replaced with a highly linear N -bit DAC.
While integrating architectures dual-slope, triple-slope, etc. These converters offer excellent power-line common-mode rejection and resolutions up to 24 bits as well as digital conveniences such as on-chip calibration. Many have programmable-gain amplifiers PGAs , which allow small signals from bridge- and thermocouple transducers to be directly digitized without the need for additional external signal conditioning circuits and in-amps. Figure 9 shows a simplified diagram of a precision load cell.
This particular load cell produces mV full-scale output voltage for a load of 2 kg with 5-V excitation.
The diagram shows the bridge resistance values for a 2-kg load. The output voltage for any given load is directly proportional to the excitation voltage, i. A traditional approach to digitizing this low-level output would be to use an instrumentation amplifier to provide the necessary gain to drive a conventional SAR ADC of bit to bit resolution. Appropriate filtering circuitry is needed due to the noise of the auto-zero in-amp.
For more discussion on input-referred noise and noise-free code resolution see for Further Reading 1. Ratiometric operation eliminates the need for a precision voltage reference. Evaluation boards and software can greatly assist in this process.
Nevertheless, there are still many instrumentation and sensor signal-conditioning applications that can be efficiently solved with a traditional in-amp for signal amplification and common-mode rejection followed by a multiplexer and a SAR ADC.
In addition, the ease of adding digital functions to a CMOS-based converter makes features such as digital-filter programmability practical with only small increases in overall die area, power, and cost.
Digital techniques for voiceband audio began in the early days of PCM telecommunications applications in the s. Except for this small region, the applications considered high speed are most often served by a pipelined ADC.
Although low-resolution flash converters remain an important building block for the pipelined ADC, they are rarely used by themselves, except at extremely high sampling rates—generally greater than 1 GHz or 2 GHz—requiring resolutions no greater than 6 bits to 8 bits.
Also requiring high-speed converters are video, radar, communications IF sampling, software radio, base stations, set-top boxes, etc. The pipelined ADC has its origins in the subranging architecture, first used in the s.
A block diagram of a simple 6-bit, two-stage subranging ADC is shown in Figure This waveform is typical for a low-frequency ramp signal applied to the analog input of the ADC. In order for there to be no missing codes, the residue waveform must not exceed the input range of the second-stage ADC, as shown in the ideal case of Figure 12A. The ADC output under such conditions might appear as in Figure At this point it is worth noting that there is no particular requirement—other than certain design issues beyond the scope of this discussion—for an equal number of bits per stage in the subranging architecture.
In addition, there can be more than two stages. Nevertheless, the architecture as shown in Figure 11 is limited to approximately 8-bit resolution unless some form of error correction is added. The error-corrected subranging ADC architecture appeared in the mids as an efficient means to achieve higher resolutions, while still utilizing the basic subranging architecture. The extra range in the second-stage ADC allows the residue waveform to deviate from its ideal value-provided it does not exceed the range of the second-stage ADC.
A basic 6-bit subranging ADC with error correction is shown in Figure 14, with the second-stage resolution increased to 4 bits, rather than the original 3 bits. The error-corrected subranging ADC shown in Figure 14 does not have a pipeline delay. After the digital data passes through the error correction logic and output registers, it is ready for use; and the converter is ready for another sampling-clock input.
This allows more settling time for the internal SADCs, SDACs, and amplifiers, and allows the pipelined converter to operate at a much higher overall sampling rate than a nonpipelined version. There are many design trade-offs that can be made in the design of a pipelined ADC, such as the number of stages, the number of bits per stage, number of correction bits, and the timing. In order to ensure that the digital data from the individual stages corresponding to a particular sample arrives at the error correction logic simultaneously, the appropriate number of shift registers must be added to each of the outputs of the pipelined stages.
For example, if the first stage requires seven shift-register delays, the next stage will require six, the next five, etc. This adds the digital pipeline delay to the final output data, as shown in Figure 16, the timing for a typical pipelined ADC, the AD This latency may or may not be a problem, depending upon the application.
If the ADC is within a feedback control loop, latency may be a problem—in the overlap area, the successive-approximation architecture would be a better choice. Latency also makes pipelined ADCs difficult to use in multiplexed applications. However, in the bulk of applications for which frequency response is more important than settling time, the latency issue is not a real problem.
Because the internal timing generally is controlled by the external sampling clock, very low sampling rates extend the hold times for the internal track-and-holds to the point where excessive droop causes conversion errors.
Therefore, most pipelined ADCs have a specification for minimum as well as maximum sampling rate. Obviously, this precludes operation in single-shot or burst-mode applications—where the SAR ADC architecture is more appropriate. Finally, it is important to clarify the distinction between subranging and pipelined ADCs. From the discussions above, it can be seen that, although pipelined ADCs are generally subranging with error correction, of course , subranging ADCs are not necessarily pipelined.
As a matter of fact, the pipelined subranging architecture is predominant because of the demands for high sampling rates, where internal settling time is of utmost importance. Pipelined ADCs are available today with resolutions of up to 14 bits and sampling rates over MHz. They are ideal for many applications that require not only high sampling rates but high signal-to-noise ratio SNR and spurious-free dynamic range SFDR. A popular application for these converters today is in software-defined radios SDR that are used in modern cellular telephone base stations.
Figure 17 shows a simplified diagram of a generic software radio receiver and transmitter. An essential feature is this: rather than digitize each channel separately in the receiver, the entire bandwidth containing many channels is digitized directly by the ADC. The total bandwidth can be as high as 20 MHz, depending on the air standard.
The channel-filtering, tuning, and separation are performed digitally in the receive-signal processor RSP by a high-performance digital signal-processor DSP.
Today's world runs on computers. Nearly every aspect of modern life involves computers in some form or fashion. As technology is advancing, the scale of computer use is increasing. Computer users include both corporate companies and individuals. Computers are efficient and reliable; they ease people's onerous jobs through software and applications specific to their needs offering convenience. Moreover, computers allow users to generate correct information quickly, hold the information so it is available at any time.
Analog synthetic biology
Selecting the proper ADC for a particular application appears to be a formidable task, considering the thousands of converters currently on the market. A direct approach is to go right to the selection guides and parametric search engines, such as those available on the Analog Devices website. Is there a way to approach the task with greater understanding—and better results? A basic understanding of these, the three most popular ADC architectures—and their relationship to the market segments—is a useful supplement to the selection guides and search engines. The classification in Figure 1 shows in a general way how these application segments and the associated typical architectures relate to ADC resolution vertical axis and sampling rate horizontal axis. The dashed lines represent the approximate state of the art in mid
Classification of Computers by Analog and Digital Signal Processing
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Nuclear Science Abstracts. Ohio: Cincinnati, University of Cincinnati Library. Cleveland, Cleveland Public Library. Columbus, Ohio State University Library. Toledo, University of Toledo Library. Seattle, University of Washington Library. Wisconsin : Madison, University of Wisconsin Library. Milwaukee, Milwaukee Public Library. Wyoming : Laramie, University of Wyoming Library.
The new edition of The Digital Media Handbook presents an essential guide to the historical and theoretical development of digital media, emphasising cultural continuity alongside technological change, and highlighting the emergence of new forms of communication in contemporary networked culture. Andrew Dewdney and Peter Ride present detailed critical commentary and descriptive historical accounts, as well as a series of interviews from a range of digital media practitioners, including producers, developers, curators and artists. He has a particular research interest in the impact of digital media upon museums and his recently co-authored book, Post Critical Museology: Theory and Practice in the Art Museum was published by Routledge in He works in the field of digital and visual culture.
The history of computing hardware covers the developments from early simple devices to aid calculation to modern day computers. Before the 20th century, most calculations were done by humans. Early mechanical tools to help humans with digital calculations, like the abacus , were called "calculating machines", called by proprietary names, or referred to as calculators. The machine operator was called the computer. The first aids to computation were purely mechanical devices which required the operator to set up the initial values of an elementary arithmetic operation, then manipulate the device to obtain the result. Later, computers represented numbers in a continuous form, for instance distance along a scale, rotation of a shaft, or a voltage. Numbers could also be represented in the form of digits, automatically manipulated by a mechanical mechanism. Although this approach generally required more complex mechanisms, it greatly increased the precision of results. The development of transistor technology and then the integrated circuit chip led to a series of breakthroughs, starting with transistor computers and then integrated circuit computers , causing digital computers to largely replace analog computers.
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From Norman, D. In press, Fall, The invisible computer. All rights reserved. We humans are biological animals. We have evolved over millions of years to function well in the environment, to survive. We are analog devices following biological modes of operation. We are compliant, flexible, tolerant. Yet we people have constructed a world of machines that requires us to be rigid, fixed, intolerant. We have devised a technology that requires considerable care and attention, that demands it be treated on its own terms, not on ours.
History of computing
We humans are biological animals. We have evolved over millions of years to function well in the environment, to survive. We are analog devices following biological modes of operation. We are compliant, flexible, tolerant. Yet we people have constructed a world of machines that requires us to be rigid, fixed, intolerant. We have devised a technology that requires considerable care and attention, that demands it be treated on its own terms, not on ours. We live in a technology-centered world where the technology is not appropriate for people. No wonder we have such difficulties. Here we are, wandering about the world, bumping into things, forgetful of details, with a poor sense of time, a poor memory for facts and figures, unable to keep attention on a topic for more than a short duration, reasoning by example rather than by logic, and drawing upon our admittedly deficient memories of prior experience. When viewed this way, we seem rather pitiful.
7. BEING ANALOG
An analog computer or analogue computer is a type of computer that uses the continuously changeable aspects of physical phenomena such as electrical , mechanical , or hydraulic quantities to model the problem being solved. In contrast, digital computers represent varying quantities symbolically and by discrete values of both time and amplitude.
But what is it, why does it hold such appeal, and how can you use it to enhance your recordings? In this article, I'll look at some of the key analogue technologies often associated with 'analogue warmth', and explain why they create the sound they do. Hopefully, this will enable you to make more informed gear choices and create mixes with an analogue feel, if that's what you're after.
Indeed, many people today have never even heard of analog computers, believing that a computer is, by definition, a digital device. The reasons had to do with the limitations of s technology: Essentially, they were too hard to design, build, operate, and maintain. Here, I will focus on a different application of analog and hybrid computers: efficient scientific computation.
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